Quantum Tunneling & Semiconductor Leakage Simulator

Quantum Transistor Gate Sandbox

Quantum Tunneling

Transistor Gate Current Leakage

In sub-nanometer chips, electrons behave as wave packets rather than solid particles. Adjust potential barriers (width & height) to study tunneling probabilities and gate leakage currents.

Physical Regime Model:

Electron Energy (E): 2.20 eV

Barrier Height (V₀): 3.00 eV

Barrier Width (L): 2.5 nm

Real-Time Telemetry

Transmission (T) 0.0%

Reflection (R) 100.0%

Barrier Status Block

Decay Length (κ⁻¹) 0.00 nm